Priority Queue implementation in Verilog

1. Pipe lined binary heap implementation

2. add and delete operation to work

3. simulation result for at least 32k nodes

[url removed, login to view] is for finding the path for insertion.

[url removed, login to view] is the thesis for parallel heap implementation. Both insert and delete data path is there.

A few helpful files are attached.

C code link:

[url removed, login to view]

[url removed, login to view]

Binary heap link:

[url removed, login to view]~adamchik/15-121/lectures/Binary%20Heaps/[url removed, login to view]

[url removed, login to view]

Please let me know, if you need any thing else

Thanks

Verilog / VHDL

ID do Projeto: #7323141

Sobre o projeto