About the Project :
Can i have more information about the project ?
About ME :
I am a programmer for 10 years and has perfect reviews on all my projects.
I am a Expert in Delphi and Scjp, I have a DiplomMais
Over 2.5 years of experience in Verilog RTL Design, Microcontroller Projects and Algorithm Design in MATLAB in Industry and Academia. My past projects include:
- PHY Layer Design on FPGA for Software Defined Radio PMais
I have 34 years experience doing FPGAs, Boards, Firmware, Software and Robotics.
I design into all brands of FPGAs including Altera, Xilinx, and Microsemi and I
have the software tools and evaluation bMais