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    325 project vlsi design trabalhos encontrados, preços em EUR

    Simple CMOS VLSI Design Project (Power, Sequential Timing, Logic Families, Wires & Memory) Look at the problems in: [login to view URL] WILL PAY GENEROUSLY. $$$ Project Description is: [login to view URL] Reference Literature: CMOS VLSI Design Happy Bidding

    €9 - €176
    €9 - €176
    0 ofertas

    Simple CMOS VLSI Design Project (Power, Sequential Timing, Logic Families, Wires & Memory) MUST BE ACCURATE AND CORRECT. WILL PAY GENEROUSLY. $$$ Project Description is: [login to view URL] Reference Literature: CMOS VLSI Design Happy Bidding

    €242 (Avg Bid)
    €242 Média
    2 ofertas

    Simple CMOS VLSI Design Project (Power, Sequential Timing, Logic Families, Wires & Memory) MUST BE ACCURATE AND CORRECT. WILL PAY GENEROUSLY. $$$ Project Description is: [login to view URL] Reference Literature: CMOS VLSI Design Happy Bidding

    €136 (Avg Bid)
    €136 Média
    1 ofertas

    I have a Introduction to VLSI Design school course project. I have done most of topics but need to ask a questions and bugs about the project. Need someone to help on this very basic project. Freelancer should known the base sturecture of VLSI lecture. Freelancer either can be student, graduat, postgraduate or more.

    €37 (Avg Bid)
    €37 Média
    8 ofertas
    VLSI small Project Encerrado left

    i have some work related to VLSI and i need someone who can do it in efficient way. Should have good command in designing logic circuit designs. should have good knowledge of CMOS, NMOS transistors etc.

    €24 (Avg Bid)
    €24 Média
    9 ofertas
    abiramiamanm Encerrado left

    vlsi coding using QUARTUS II software FPGA

    €17 (Avg Bid)
    €17 Média
    3 ofertas

    I have 1864 technical words. I want to remove the Plagiarism of this work. Current Plagiarism is 82%. I want plagiarism <20%. I have checked plagiarism at turnitin software. I will check final work plagiarism also at turnitin software. Please the bid only those candidates who can work in my given budget. My budget is 200 (INR) for this work. I attached the same file in the attachments.

    €4 / hr (Avg Bid)
    €4 / hr Média
    17 ofertas

    I need someone to create video tutorials for VLSI design from basics to advanced concepts. Advanced Digital Design Concepts CMOS Logic fundamentals RTL Design with Verilog HDL's ASIC Design Systhesis Concepts ASIC Design Stratagies Static Timing Analysis Low power design implementation Design and power Constraints Perl/Shell Scripting ...

    €436 (Avg Bid)
    €436 Média
    7 ofertas

    looking for freelancer to develop web content for VLSI training institute. Following tabs required. Home VLSI Courses Offered Custom Layout Design Physical Design Design Verification DFT Placements About us Contact us

    €94 (Avg Bid)
    €94 Média
    12 ofertas

    Hi, I have a Flash 6 bits ADC, would like to attempt to make a 12 bits ADC, can you help me to achieve it ?

    €109 (Avg Bid)
    €109 Média
    16 ofertas

    This is pavan. I am from the VLSI industry. I need a technical writer to explain 3 subjects(digital electronics, Verilog, and VHDL).

    €109 (Avg Bid)
    €109 Média
    17 ofertas

    I need to develop shell script for EDA Tool in VLSI domain

    €73 (Avg Bid)
    €73 Média
    12 ofertas

    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Modelsim] Candidate

    €153 (Avg Bid)
    €153 Média
    12 ofertas

    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Modelsim] Candidate

    €130 (Avg Bid)
    €130 Média
    4 ofertas
    VLSI EDA Cadence Encerrado left

    RISC-V CPU chip high performance low power -- run EDA tools to generate GDSII synthesis and place and route

    €33 / hr (Avg Bid)
    €33 / hr Média
    14 ofertas

    Our project relates to vs1005 (All in one audio player on a chip) [login to view URL] by [login to view URL] in combination with the developer board. Programs are written using VLSI Solution's Integrated Development Environment VSIDE [login to view URL] We are coding a VS1005 and want to use a stepper motor

    €114 (Avg Bid)
    €114 Média
    3 ofertas

    An existing algorithm is available, apply it and get the results. Then make minor changes in it for improvement and get the results

    €54 (Avg Bid)
    €54 Média
    5 ofertas
    SD Pro Solutions Encerrado left

    ...Engineering and Educational Project provider for Diploma, Engineering (Under Graduate, Post graduates) and Research Scholars. SD Pro was established in the year 2013 for Project Development, Course Designing, Training, and placement guidance, based at South India. SD Pro providers Training and Projects in Embedded systems, VLSI, Matlab, Power systems, Power

    €252 (Avg Bid)
    €252 Média
    4 ofertas

    Please find the document in the attachments. Solve the problems step by step with the given data/parameters and please mention all the steps clearly and specify the units for each and every step correctly and make sure the calculation is perfect. For the first question please draw the circuit diagram on a paper and attach it with the solutions and please make sure all the solutions are in WORD doc...

    €77 (Avg Bid)
    €77 Média
    5 ofertas

    Based on my current design of CDS active pixel, I'd like to have it extended in order to make an implementation of CMOS Image Sensors of array 512x512 at least. You need to make a proof of concept and make simulations of it. We'll use Cadence Virtuoso 6.17

    €194 (Avg Bid)
    €194 Média
    6 ofertas
    Data Collection Encerrado left

    ...data. [login to view URL] If you want to be sure and on the right page to proceed with this project, you can do a sample of 3 colleges - NIT, IIT and any local college and ping me for a check so we can ensure that you are on the right track. • Go to the website of the mentioned

    €115 (Avg Bid)
    €115 Média
    45 ofertas
    VLSI Trainer Encerrado left

    We are looking for an experienced Freelancer trainer who can train on VLSI in Bangalore. The curriculum will be provided by the company for the same.

    €676 (Avg Bid)
    €676 Média
    11 ofertas

    Hello, I have made a SAR 8 bits binairy coded ADC using method of 2 steps Successive Approximation, but it is a bit buggy. I need very experienced engineer in this field, otherwise it would just be loosing time. The simulation must be done in Cadence Virtuoso 6.x Thanks !

    €35 (Avg Bid)
    €35 Média
    2 ofertas

    Design and optimization of low power VLSI circuits for Leakage power reduction using Clock Gating with GSA

    €172 (Avg Bid)
    €172 Média
    4 ofertas

    ...tracking device for a specific application. I am seeking a solution that is an android and IOS application that is designed to track and locate a sensor (IOT, GPS, RF or other VLSI) technology that is embedded within a projectile that is no larger than 1.68-inches (42.7mm) in width, height and length. The IOS and Android applications should be able to

    €280 (Avg Bid)
    ADC
    €280 Média
    20 ofertas
    TCL automation VLSI Encerrado left

    I want to parse a log file and use regexp to filter some patterns and put them in output log file. I have the script. 1- put the -p and -ig inside text files and feed it to code. like this: [login to view URL] -i [login to view URL] -o [login to view URL] -p [login to view URL] -ig [login to view URL] [login to view URL] is: warning| info [login to view URL] is: error| error: 2- in the [login to...

    €95 (Avg Bid)
    €95 Média
    5 ofertas

    Design and optimization of low power VLSI circuits for Leakage power reduction using Clock Gating with GSA

    €162 (Avg Bid)
    €162 Média
    7 ofertas

    Project description is under: [login to view URL] Will provide a good reference as well.

    €32 (Avg Bid)
    €32 Média
    5 ofertas

    Sequential Circuit Design Look at the project description, zip files have the actual images. Also attached a reference.

    €30 (Avg Bid)
    €30 Média
    5 ofertas

    Sequential Circuit Design Look at the project description, zip files have the actual images. Also attached a reference.

    €13 - €22 / hr
    €13 - €22 / hr
    0 ofertas
    VLSI coding language Encerrado left

    I need help in VLSI coding language, micro controller , C++ and C

    €372 (Avg Bid)
    €372 Média
    8 ofertas

    Vlsi project on excel

    €20 (Avg Bid)
    €20 Média
    4 ofertas
    magic VLSi Encerrado left

    Sketch a transis...widths to achieve ratio of 1(i.e. equal rising and falling resistances) 2- Use Magic VLSI layout tool to Design your layout of the sized design then use irsim to simulate your design (all combinations of input A,B,C). The report should include the following.  Design document  Testing results  Source code and layout

    €34 (Avg Bid)
    €34 Média
    5 ofertas
    VLSI homework Encerrado left

    everything is clear in the PDF .................................................................................................................................................................................regards

    €44 (Avg Bid)
    €44 Média
    1 ofertas

    i need 3 to 4 papers review for the paper with brief explanation which is related to VLSI electronics

    €143 (Avg Bid)
    €143 Média
    2 ofertas
    €156 Média
    4 ofertas

    Build a basic building block of the Carry-Skip adder and test it for functionality in LTSpice. Description is in: [login to view URL] Reference: [login to view URL]

    €25 (Avg Bid)
    €25 Média
    9 ofertas

    Aim is to design a successive approximation register based analog to digital converter using cadence tool (any vlsi back end tool)

    €840 (Avg Bid)
    €840 Média
    8 ofertas
    Logo Design Encerrado left

    ... SBL TECHNOLOGIES is a proven semiconductor and embedded design house in India, with deep focus and network in Indian Defence and production agencies. Setup by an experienced team of engineers from the industry to carry-out research, design, development and manufacturing in the field of VLSI and Embedded systems. PCB services from the initial stage

    €31 (Avg Bid)
    €31 Média
    20 ofertas

    VLSI developer expertise enhanced in optimization concepts are required

    €450 (Avg Bid)
    €450 Média
    7 ofertas

    ...need a project suggestion for a masters project in VLSI testing and verification using Synopsis EDA tools for sequential circuits, because I have to submit a project proposal. Once a project suggestion seems acceptable, I will need help in finishing the project with desired outputs and compare the same with FPGA implementation. By bid for project...

    €522 (Avg Bid)
    €522 Média
    9 ofertas
    Vlsi project Encerrado left

    I need some one has background about VLSI

    €79 (Avg Bid)
    €79 Média
    8 ofertas
    Need Help in project Encerrado left

    I need help in my company project (more details will be share with shortlisted candidate) You have to be very good in MIPS assembly language RTL, verilog, and basics VLSI technology to be shortlist you have to solve one MIPS Asm. question (attached below) as soon as possible.

    €854 (Avg Bid)
    €854 Média
    5 ofertas

    I am going to do my research so I need useful research ideas in electronics, electrical, IT domains and those who have research ideas in VLSI , Embedded systems, Finfet technology, Drones bid me.

    €57 (Avg Bid)
    €57 Média
    14 ofertas

    Multiplier cell design with the application of 8X8 multiplier, related to VLSI design (very large scale integration). required : some report corrections in chapter 1 and 2 regarding the references and report writing. I have a attached a copy of the report and a paper specifying the corrections.

    €18 (Avg Bid)
    €18 Média
    6 ofertas
    Suggest a topic Encerrado left

    Looking for project topics in VLSI testing and verification using Synopsis EDA tools and TETRAMAX for sequential circuits. Once a topic has been selected, I would need help in finishing the project with desired outputs. Finally, I would also need an explanation of the functioning after completing the project.

    €371 (Avg Bid)
    €371 Média
    9 ofertas

    Multiplier cell design with the application of 8X8 multiplier, related to VLSI design (very large scale integration). required : some report corrections in chapter 1 and 2 regarding the references and report writing. I have a attached a copy of the report and a paper specifying the corrections.

    €20 (Avg Bid)
    €20 Média
    4 ofertas
    Write some software Encerrado left

    I need you to develop some software for me. I would like this software to be developed for Windows using Python. floor planning of vlsi module , I have to optimise it using Patrical swarm algorithm , need gui for it It requires 1. formation of model ,i.e placement of [login to view URL] with a big block 2. if there are 4 block within a big block then there

    €163 (Avg Bid)
    €163 Média
    4 ofertas