Mips vhdl trabalhos

Olá Nilson E., eu vi seu perfil e gostaria que você me ajudasse, preciso que seja feito um código em VHDL simulando dois elevadores de 5 andares, onde o elevador que chegará será o mais próximo do andar que o mesmo foi chamado. Posso dar mais informações do projeto de forma privada, mas é basicamente isso.

Projeto mips

Preciso que seja feito um código no quartus prime II em VHDL simulando dois elevadores de 7 andares, onde o elevador que chegará será o mais próximo do andar que o mesmo foi chamado. Posso dar mais informações do projeto de forma privada, mas é basicamente isso. Deve conter waveform.

O freelancer deverá conhecer as linguagens = C / vhdl / verilog e já ter trabalhado com FPGA / ASIC Portar e otimizar um código que já tenho pronto em "c" para vhdl ou verilog esse código gera uma string de 14 / 15 dígitos, será usado uma placa fpga xillinx spartan 6 ( a empresa xillinx disponibiliza todo o ambiente necessário ). converter a string em Sha256 usando placa asic depois de convertido em sha256 compara com um sha256 informado no inicio do processo, se igual finaliza, se não reinicia o processo. Deverá ser usado a Raspberry Pi 3 para termos uma interface ( teclado e monitor ) para inserir o código inicial

Trabalho em assembly mips em português

Programa simples de um trabalho para uma disciplina para fazer um programa em mips utilizando o simulador MARS . Falar no email: [REMOVED BY FREELANCER.COM ADMIN] para detalhes

Implementar um jogo em verilog ou vhdl em vga

Segue trabalho em anexo

Implementar um JOGO mais simples possível com apenas os leds na linguagem verilog ou vhdl... Pode ser o jogo de decorar as cores dos leds que piscam, ou campo minado com leds, qualquer jogo simples (sem gráficos VGA.. projeto super simples na linguagem verilog).

Preciso fazer um hardware com FPGA Altera ou Spartan da Xilinix programado em VHDL. Ele precisa receber e enviar pacotes UDP de um computador através da porta Ethernet. Eu já tenho o software que faz o envio dos pacotes UDP, hoje eu uso um hardware com FPGA Spartan III, pronto comprado da China. O hardware e o software que roda no computador são usados para controlar LEDs que utilizem drives LPD6803, WS2801, etc. O software envia os dados (frames) através de pacote UDP para o hardware (FPGA) que recebe, armazena em buffer de memoria RAM do FPGA e então envia estes dados para os LEDs através de uma porta SPI que deve ser implementada dentro do FPGA. Monitorando e capturando os pacotes UDP que o computador envia para o FPGA fica f&aa...

O MIPS Multiciclo utiliza uma única memória para armazenar programa e dados. A memória é endereçada pelo PC ou pelo registrador na saída da ULA, através de um multiplexador, sendo as instruções lidas da memória transferidas para o Resitrador de Instruções – RI e os dados lidos transferidos para o Registrador de Dados da Memória – RDM. Neste trabalho deve-se instanciar o conjunto de módulos que compõe a parte da unidade operativa encarregada do acesso à memória. É composta pelos seguintes componentes: • PC (32 bits) • REM – registrador para endereçar os dados da memória (32 bits) • multiplexador de entrad...

DESCRIÇÃO A. Display gráfico mapeado em memória • O MARS oferece, dentre as suas ferramentas de apoio ao desenvolvimento de aplicações em assembler MIPS, uma janela gráfica baseada em pixels. Suas principais características são as seguintes: ‣ Resolução configurável, default 512 x 256 pixels. ‣ Cada pixel representado por uma palavra de 32 bits, no formato RGB, um byte para cada cor. Red = 0x00FF0000, Green = 0x0000FF00, Blue = 0x000000FF. ‣ Display mapeado em memória. O ponto superior esquerdo da tela corresponde ao pixel com coordenadas (0, 0). A coordenada x cresce para a direita e a coordenada y cresce para baixo. ‣ O endereço correspondente ao primeiro pixel é...

ler os caracteres digitados pelo utilizador e guardar esses caracteres numa string. Essa string será mais tarde convertida para um número inteiro. Se o utilizador tentar introduzir caracteres não-válidos (isto é, que não sejam os algarismos de 0 a 9) o programa "queixa-se" e começa tudo de novo.

Programa: (trabalho 7) O programa deverá pedir ao utilizador um número inteiro. Em vez de  utilizar a chamada ao sistema de código 1 irá utilizar um ciclo e a chamada ao sistema de código  12 (leitura de um caracter1 ) e armazenar os caracteres digitados num array. Se o utilizador  introduzir um caracter não-válido (por exemplo, uma letra) o programa mostra uma mensagem  de erro e começa tudo de novo. O "Enter" (código ASCII 10) deve ser reconhecido como o sinal  de que o utilizador acabou de digitar o número. Não esquecer de terminar a string com um zero.  No fim o número introduzido (armazenado na string) deverá ser mostrado com a chamada ao  sistema de ...

Preciso de código em VHDL e respectivos ficheiros de testbench para um relógio digital. No LCD deve de aparecer: Linha 1: HH:MM:SS Linha 2: Relógio PNL Horas (HH) de 00 a 23 Com possibilidade de acerto Placa com frequência de relógio de 50Mhz Placa onde irá funcionar Xilinx/ Diligent Sparten-3E Preciso do código e ficheiros de testbench até 9 de fevereiro de 2014

I'm looking for a developer to create a system for my Zybo Z7 board that can detect people in real-time through a connected pcam5c camera and display the detection text on the ...Real-time Video Streaming: The video feed should be streamed in real-time. - Text Overlay: The detection results should be displayed as a text overlay on the video. Skills/Experience Required: - Proficient in Xilinx SDK and Xilinx Vivado. - Strong background in object detection, particularly with people. - Previous experience with video processing and streaming. - Knowledge of FPGA programming and VHDL/Verilog is a plus. Please note that my budget for this project is $60. I'm open to hearing from freelancers who can deliver within this budget. I have worked on single pixel (multipixel zoom.v i...

Hi ExpertSoul, I noticed your profile and would like to offer you my project. We can discuss any details over chat.

I am looking to integrate two ultrasonic sensors onto a Nexys A7 FPGA board using VHDL. My primary goal is using these sensors for object tracking and distance measurement. Integrate TWO HCSR-04 ultrasonic sensors to an Nexys A7 fpga board so that I can read data from both sensors. I need for the seven-segment display that is on the board to show the distances measured. Using a pushbutton on the board, have the display change to show readings from sensor 1 and when pushed the display shows readings from sensor 2 and vice versa. So basically, the pushbutton toggles which sensor's measurement is displayed on the seven segment display. Also, another push button will be used to toggle back and forth between displaying the distance in centimeters (cm) or inches (in) for both sensor...

I am looking to integrate two ultrasonic sensors onto a Nexys A7 FPGA board using VHDL. My primary goal is using these sensors for object tracking and distance measurement. Integrate TWO HCSR-04 ultrasonic sensors to an Nexys A7 fpga board so that I can read data from both sensors. I need for the seven-segment display that is on the board to show the distances measured. Using a pushbutton on the board, have the display change to show readings from sensor 1 and when pushed the display shows readings from sensor 2 and vice versa. So basically, the pushbutton toggles which sensor's measurement is displayed on the seven segment display. Also, another push button will be used to toggle back and forth between displaying the distance in centimeters (cm) or inches (in) for both sensor...

I'm seeking a proficient VHDL engineer to assist in the development of digital signal processing on a Basys Board 3, requiring knowledge in digital and analog inputs and outputs. The specifics of the digital signal processing algorithm are unclear at this stage due to omitted information. Key skills and experience needed: - Proficiency with VHDL and Basys Board 3 - Sound understanding of both analog and digital inputs and outputs - Aptitude for problem-solving and working with incomplete details - Prior experience in digital signal processing is advantageous.

I'm seeking an experienced and detail-oriented developer to create a Custome PCILeech firmware for SCREAMER PCIE SQUIRREL direct access memory card utilizing the 7 Series FPGA 35t chip. Firmware must...Squirrel. Firmware must bypass and avoid anti-cheat detection on EAC/BE etc. Responsibilities: - Develop firmware for PCILeech FPGA - Debugging and problem-solving throughout firmware development Skills & Experience: - Strong experience in FPGA programming and firmware development - Excellent debugging and problem-solving skills - Experience with high-speed data transmission - Proficiency with VHDL/Verilog languages The timeline for project completion is flexible, indicating a strong emphasis on quality over speed. However, I am eager to commence with the right candidate a...

Completing an intermediate-level circuit simulation is on the top of my agenda, and time is of the essence. Key Requirements: - Generate a simulation circuit using either Verilog or VHDL. - The complexity level should be intermediate, meaning that it should include components such as adders, decoders, and multiplexers. Ideal Candidate: An experienced freelancer with a strong background in circuitry and simulation languages such as Verilog or VHDL. Quick response and comprehension of task requirements are paramount due to the urgency of the project. Remember, the successful completion of this project is deemed urgent. Therefore, a prompt response and start are appreciated.

I am seeking a proficient electronic engineer with an in-depth understanding of VHDL (high level logic design) it's related to xlinx and vivado

In this project we will be implementing a control system using the Lattice iCE FPGA. The task at hand involves converting a schematic for a Synchronous Data Link Control (SDLC) data stream to an SPI Master data stream converter to Verilog or VHDL and then verifying the design through simulation. And finally creating the file that will be used to program the target part in production. The ideal freelancer for this job is proficient in working with FPGAs, preferably with a strong background in the Lattice iCE FPGA. I’m looking for someone adept in schematic to HDL conversion. Experience in working with SDLC data will serve as a plus. Please ensure that your experience and skills include: - FPGA development, specifically with the Lattice iCE. - Expertise in schematic to HDL ...

I'm in need of a professional with expertise in MIPS assembly programming. My project involves the intermediate level of work - encompassing areas such as handling registers, system calls, and recursion. Your task will primarily be focused on developing new functions. You should possess: - Thorough understanding of MIPS architecture - Proficiency in assembly programming - Experience with system calls - Capability to handle registers - Knowledge on recursion in MIPS programming Your primary responsibility will be to create new functions, so a problem-solving mindset is important. Innovation is highly valued in this role and your creativity in developing new solutions will be a key indicator of success. Remember, your knowledge and techniques in MIPS assembly...

We've written some VHDL code for FPGA we need someone to adapt it to our coding standard. we will share a report of all violations for a set of files and the VHDL code shall be modified as specified in the coding standard. To make an example all signals shall be names s_<signal_name>, signal test_sig : std_logic; -- violation! signal s_test_sig : std_logic; -- correct the code will be shared with a Gitlab repo, a dedicatd branch will be created to modify the original code. the code shall be compiled, to chekc no errors were introduced. as soon as the code is delivered we wil rerun the checker to chek for residual errors, and we would provide a feedback (unless the freelancer has the same checker tool)

You will modify file transform.c with any code transformations your compiler requires, and file mips_ast.c by implementing an AST traversal that emits MIPS code, thus compiling programs in Albatross. You may need to modify your semantic analysis to add the Albatross intrinsics as functions. will need to pass the 10 test cases

We have an existing VHDL project that implements various memory protocols that runs on a Lattice FPGA (MachXO2 LCMXO2-4000HC). The FPGA is used as a high-speed data bridge between an ARM based microcontroller and a connected memory device (using SMC). This project is to expand the existing project and add support for the eMMC protocol and eMMC Flash memory devices. For testing, we have acquired various 64GB devices that are available on Mouser and DigiKey. Basic functionality is required: reading/writing/erasing with legacy speeds and 1,4,8-bit data bus. Project can be extended to include additional modes / features. The project is in Lattice Diamond, and written in VHDL. All work must be done to the existing project. And tested using exported bitstream binaries. Note: if ...

We have an existing VHDL project that implements various memory protocols that runs on a Lattice FPGA (MachXO2 LCMXO2-4000HC). The FPGA is used as a high-speed data bridge between an ARM based microcontroller and a connected memory device (using SMC). This project is to expand the existing project and add support for the eMMC protocol and eMMC Flash memory devices. For testing, we have acquired various 64GB devices that are available on Mouser and DigiKey. Basic functionality is required: reading/writing/erasing with legacy speeds and 1,4,8-bit data bus. Project can be extended to include additional modes / features. The project is in Lattice Diamond, and written in VHDL. All work must be done to the existing project. Note: if you want to make a bid, please respond with yo...

I'm seeking a skilled developer to carry out the task of implementing a basic/compact model of The C versions of games played on a grid consisting of a small 2D array and are displayed using simple ASCII text characters using printf. They are no fun to play in the C version, but that allows you to test out your game logic, etc. **Key Tasks:** - Implementation of a functional MIPS architecture - Ensuring architecture's simplicity and understandability for educational purposes

...specifications and performance targets for the graphics card, considering factors such as core count, memory bandwidth, and power efficiency. Designing and modeling the GPU architecture using computer-aided design (CAD) software, incorporating advanced features for rendering, compute, and artificial intelligence. Implementing the design using hardware description languages (HDLs) such as Verilog or VHDL, and simulating the functionality using specialized tools. Conducting rigorous testing, validation, and optimization to ensure the graphics card meets performance, reliability, and compatibility standards. Iterating on the design based on feedback, performance analysis, and emerging technologies. **Power Efficiency:** - My priority is an energy-saving design. The challenge lies i...

...this project. - Familiarity with high-speed interface protocols and their integration into FPGA designs. **Ideal Skills and Experience:** - Strong background in electrical engineering or computer science, with a focus on hardware design. - Prior projects or experience in FPGA-based design, especially those involving DSP or video processing. - Proficient in C/C++ for algorithm development and HDL (VHDL/Verilog) for hardware description. - Knowledge of optimization techniques for power efficiency and performance maximization in FPGA designs. - Ability to work with simulation tools and perform thorough validation and testing of the designed hardware. My project calls for an innovative and technically skilled freelancer who can navigate the complexities of advanced FPGA design. If ...

I'm seeking a proficient software engineer with solid experience in Assembly and C++. The task is to design a MIPS simulator for educational purposes, leveraging both languages and their capabilities. The simulator shall: - Support various MIPS instructions, providing ample learning material and exercises. - Have an interactive user interface, proving straightforwards for beginners yet satisfying for more advanced users. - Possess the ability to step through code execution, offering users the chance to see how their code runs on a granular level. Strong grasp of Assembly language, C++, and an understanding of how to create engaging, instructional software are key skills needed for this project.

...FPGA-based game similar to a classic crossing road game with a twist. Required Skills: - Proficient in VHDL programming - Experience with FPGA design and implementation - Familiar with character movement logic - Ability to implement a scoring system into FPGA projects Project Requirements: - Design VHDL code specifically for an FPGA target device - Develop code that allows character movement within the game - Create a scoring system to track and display the player's score -able to score to reach a target and gameover point -able to control the game using fpga or keyboard - able to connect via vga Ideal Candidate: - You should have a portfolio demonstrating previous work with FPGAs and VHDL. - Experience in game development or simulation is highly desirable...

...freelancer to implement an intermediate System on Chip (SoC) module using VHDL for an FPGA-based system. Key Responsibilities: - Develop and simulate VHDL code for an FPGA-based SoC module. - Ensure code meets functionality and performance requirements. - Provide documentation and support for testing and integration. Ideal Skills: - Proficient in VHDL programming. - Experience with FPGA design and implementation. - Familiar with SoC architecture and digital design principles. - Ability to write clean, optimized, and well-documented code. Qualifications: - Previous projects involving VHDL and FPGAs. - Understanding of intermediate SoC modules. - Good problem-solving and communication skills. Project Deliverables: - Working VHDL code as per specifica...

I'm seeking for a highly skilled coder to enhance efficiency of the existing computer system. In this project, the main goal is to optimize the code running on a computer system with a MIPS architecture. While the specific programming language was not mentioned, proficient knowledge in languages such as C++, Java, or Python would be beneficial as these are the commonly used ones in such projects. Successful applicants ideally should have: * Strong experience in computer architecture and MIPS * Proven track record of optimizing code for efficiency * Expertise in at least one of the following languages: C++, Java, or Python * Possess problem-solving skills I'm open to detailed project proposals to understand your approach towards this project. Previous work sam...

I am in need of a highly skilled tutor in Advanced Computer Architecture. This position requires; - an advanced mastery in MIPS, 5-stage Pipelines, Exploiting ILP and Tomasulo’s algorithm among other concepts - ability to effectively communicate these concepts at a high level over online video calls. The selected tutor should possess a quick-paced teaching style to keep up with my advanced learning tempo. Hands on experience in these areas would be ideal, but a deep theoretical understanding could suffice.

I am looking for an expert in FPGA design who can help create a SmartFusion2 design with specific features. the designer shall be able to - update VHDL design to control other peripherals integrating in the current design - update the SW on the ARM Ideally, the testing function should use predefined test cases. The main focus of the testing system needs to be hardware testing. Therefore, essential skills and experience include knowledge of hardware testing techniques and familiarity with FPGA configuration, power management, and communication protocols.

I'm looking for an experienced VHDL developer to create a traffic-themed crossing road game for FPGA, with a keen eye for detail and efficiency in design. Key Responsibilities: - Design and implement a VHDL-based FPGA system - Program player movement controls and responsive gameplay - Develop dynamic obstacle generation mechanics Skills Required: - Proficient in VHDL and FPGA programming - Strong understanding of digital design and signal processing - Experience in gaming or simulation projects preferred The successful freelancer must showcase previous FPGA projects, ideally with gaming applications. Please provide code samples or portfolio links with your proposal.

I'm seeking a proficient software engineer with solid experience in Assembly and C++. The task is to design a MIPS simulator for educational purposes, leveraging both languages and their capabilities. The simulator shall: - Support various MIPS instructions, providing ample learning material and exercises. - Have an interactive user interface, proving straightforwards for beginners yet satisfying for more advanced users. - Possess the ability to step through code execution, offering users the chance to see how their code runs on a granular level. Strong grasp of Assembly language, C++, and an understanding of how to create engaging, instructional software are key skills needed for this project.

I'm seeking a talented individual with a strong background in VHDL and FPGA design, specifically with Altera products, who can successfully implement communication interfaces within my project. The ideal candidate will possess a deep understanding of UART protocol and be capable of integrating it with other interfaces. Requirements: - Proficiency in VHDL programming for FPGA - Experience with Altera FPGA design tools - Successful implementation of UART interfaces - Knowledge in LAN and USB communication The scope of the project includes: - Implementing a low-speed UART interface (up to 115200 bps) - Integrating UART with LAN and USB interfaces on the FPGA The right freelancer will have a strong portfolio demonstrating their expertise in FPGA interface design and commu...

...4x4 matrix and 2x2 kernel convolution. - Employ kogge stone adder for efficiency. - Integrate vedic multiplier for rapid multiplication. - Ensure system operates with integer value precision. - Target design is for an FPGA using Verilog or VHDL. **Ideal Skills** - Proficiency in FPGA programming. - Strong background in digital arithmetic circuits. - Experience with kogge stone adders and vedic multipliers. - Knowledge of image processing techniques. - Use of Shifting , multiplication and addition in performing 2d convolution - Fluent in Verilog or VHDL coding. - Ability to optimize for power, area, and speed. **Project Deliverables** - Optimized HDL code for the convolution system. - Synthesis and simulation results demonstrating performance. - Documentation outlining de...

We have an existing VHDL project that implements various memory protocols that runs on a Lattice FPGA (MachXO2). The FPGA is used as a high-speed data bridge between an ARM based microcontroller and a memory device. This project is to expand that to add eMMC support, such as typical 64GB eMMC 5.1 devices available on Digikey/Mouser. Basic functionality is required: reading/writing/erasing with legacy speeds and 1,4,8 bit data bus. Project can be extended to include additional modes / features. Note: if you want to make a bid, please respond with your previous experience with working with eMMC devices.

...consectutively per key No more then 6 number consectutively per key The private keys in the hashtable cant have any of these values in them . This will drastically reduce the scan space Skills and Experience: - Advanced level of familiarity with FPGA and bitstream development - Strong understanding of FPGA architecture and programming languages - Proficiency in programming languages such as VHDL or Verilog - Experience in designing and implementing complex FPGA systems - Knowledge of hardware design principles and methodologies Project Requirements: - Develop a Kangaroo Pollard FPGA Bitstream for personal use - Create an operating application with specific features based on my requirements - Integrate the bitstream and operating application to work seamlessly together - Pro...

i am looking for an individual who can do perform the project on Quartus in VHDL formate. We are looking for only experts.

I am looking for a skilled software developer to create a...that connects FPGA cards for my temperature measurement equipment. This role involves designing a program that is compatible with the Windows operating system. To develop the connection effectively, a solid knowledge of VHDL, Spartan 3 boards and C++ programming will be required. The ideal developer should be comfortable working with a basic command line interface. The main focus is on functionality, not graphic aesthetics. To be successful, both the functionality and security of the program must be prioritized. Key essentials for the job include: - Deep knowledge of VHDL - Knowledge of Spartan 3 card. - Know C++ programming. - Experience with command line interfaces. - Ability to ensure security and error checkin...

I am looking to hire an individual who really understand this subject. should be able to solve any problems related to this subject. communicate and be able to write good programming and simulation designs.

Design a TImestamp generator from PPS and a NMEA parser in VHDL

I am looking for a programmer to help me with my project. Programming Language: VHDL Timeframe: ASAP Skills and Experience: - Proficiency in VHDL programming language - Experience in developing and implementing VHDL designs - Familiarity with FPGA programming - Strong problem-solving skills and attention to detail - Ability to work efficiently and meet tight deadlines Project Details: - The project involves developing and implementing VHDL designs for a specific application. - The programmer will be responsible for coding, testing, and debugging the designs. - The project needs to be completed as soon as possible, so the ability to work quickly and efficiently is crucial. If you have experience in VHDL programming and are available to start immediat...

I am looking for a skilled MIPS assembly language programmer who can optimize an existing partially functional program within a week. Specific requirements for the project: - Optimize an existing program written in MIPS assembly language - The program is currently partially functional and needs improvement - The deadline for the project is four days Ideal skills and experience: - Proficiency in MIPS assembly language programming - Strong understanding of program optimization techniques - Experience in debugging and improving existing programs - Ability to work efficiently and meet tight deadlines If you have the necessary expertise and can deliver high-quality results within the given timeframe, please submit your proposal.