Assemblyx86 verilog vhdl trabalhos

Boa tarde, Lívia! Gostaria de ter a sua consultoria para o meu projeto, que consiste em integrar um processador (construído em verilog) a um Gerenciador de processos. No entanto, o prazo é apertado: dia 22/02 terça-feira. Não tenho problema com pagar a mais.

Boa tarde, Canisio! Gostaria de ter a sua consultoria para o meu projeto, que consiste em integrar um processador (construído em verilog) a um Gerenciador de processos. No entanto, o prazo é apertado: dia 22/02 terça-feira. Não tenho problema com pagar a mais.

Boa tarde, Nilson! Gostaria de ter a sua consultoria para o meu projeto, que consiste em integrar um processador (construído em verilog) a um Gerenciador de processos. No entanto, o prazo é apertado: dia 22/02 terça-feira. Não tenho problema com pagar a mais.

Boa tarde, Iaçanã! Gostaria de ter a sua consultoria para o meu projeto, que consiste em integrar um processador (construído em verilog) a um Gerenciador de processos. No entanto, o prazo é apertado: dia 22/02 terça-feira. Não tenho problema com pagar a mais.

I need a Verilog code simulating two 7-storey elevators, where the elevator that will arrive will be the closest to the floor it was called. I can give more information about the project privately. Preciso que seja feito um código Verilog simulando dois elevadores de 7 andares, onde o elevador que chegará será o mais próximo do andar que o mesmo foi chamado. Posso dar mais informações do projeto de forma privada.

Olá Nilson E., eu vi seu perfil e gostaria de lhe oferecer meu projeto, preciso que seja feito um código Verilog simulando dois elevadores de 7 andares, onde o elevador que chegará será o mais próximo do andar que o mesmo foi chamado. Posso dar mais informações do projeto de forma privada.

Olá Nilson E., eu vi seu perfil e gostaria que você me ajudasse, preciso que seja feito um código em VHDL simulando dois elevadores de 5 andares, onde o elevador que chegará será o mais próximo do andar que o mesmo foi chamado. Posso dar mais informações do projeto de forma privada, mas é basicamente isso.

Preciso que seja feito um código no quartus prime II em VHDL simulando dois elevadores de 7 andares, onde o elevador que chegará será o mais próximo do andar que o mesmo foi chamado. Posso dar mais informações do projeto de forma privada, mas é basicamente isso. Deve conter waveform.

Criar um processador em verilog, contendo as especificações citadas no pdf.

O freelancer deverá conhecer as linguagens = C / vhdl / verilog e já ter trabalhado com FPGA / ASIC Portar e otimizar um código que já tenho pronto em "c" para vhdl ou verilog esse código gera uma string de 14 / 15 dígitos, será usado uma placa fpga xillinx spartan 6 ( a empresa xillinx disponibiliza todo o ambiente necessário ). converter a string em Sha256 usando placa asic depois de convertido em sha256 compara com um sha256 informado no inicio do processo, se igual finaliza, se não reinicia o processo. Deverá ser usado a Raspberry Pi 3 para termos uma interface ( teclado e monitor ) para inserir o código inicial

Implementar um jogo em verilog ou vhdl em vga

Jogo VGA em Verilog para FPGA

Segue trabalho em anexo

Implementar um JOGO mais simples possível com apenas os leds na linguagem verilog ou vhdl... Pode ser o jogo de decorar as cores dos leds que piscam, ou campo minado com leds, qualquer jogo simples (sem gráficos VGA.. projeto super simples na linguagem verilog).

Preciso de um projeto em Verilog que gerencie o consumo de água de uma residencia.

Neste projeto você irá utilizar Verilog para implementar o algoritmo Tomasulo de despacho simples como descrito no livro texto (Seções 3.4 e 3.5). Descrição No algoritmo Tomasulo a execução das instruções é dividida em 3 estágios: despacho, execução e write back. Esses três estágios acessam componentes críticos de hardware: o CDB, as estações de reserva (nas quais ocorrem as renomeações) e as unidades funcionais. Você deverá implementar: (1) as estações de reserva, (2) os estágios do algoritmo, (3) as unidades funcionais de multiplicação/divisão e soma/subtração, (4...

Preciso fazer um hardware com FPGA Altera ou Spartan da Xilinix programado em VHDL. Ele precisa receber e enviar pacotes UDP de um computador através da porta Ethernet. Eu já tenho o software que faz o envio dos pacotes UDP, hoje eu uso um hardware com FPGA Spartan III, pronto comprado da China. O hardware e o software que roda no computador são usados para controlar LEDs que utilizem drives LPD6803, WS2801, etc. O software envia os dados (frames) através de pacote UDP para o hardware (FPGA) que recebe, armazena em buffer de memoria RAM do FPGA e então envia estes dados para os LEDs através de uma porta SPI que deve ser implementada dentro do FPGA. Monitorando e capturando os pacotes UDP que o computador envia para o FPGA fica f&aa...

...provenientes das chaves devem ser concatenados com 24 ‘0’s para formar uma palavra de 32 bits. Os sinais de controle m1, m2, m3, wPC, wMem, wRI devem ser associados às chaves de entrada. Um arquivo comprimido com todos os módulos VHDL do MIPS multiciclo é disponibilizado no Moodle. O código MIPS a ser carregado na memória está contido no arquivo mem.mif. Para exibição dos dados nos mostradores, utilizar os acionadores de display de 7 segmentos feito na primeira aula de laboratório. Simular o circuito no ModelSim e prototipá-lo na placa DE2-70. Escrever um testbench VHDL para simulação no ModelSim realizando as seguintes tarefas: • ler o conteúdo das inst...

Preciso de código em VHDL e respectivos ficheiros de testbench para um relógio digital. No LCD deve de aparecer: Linha 1: HH:MM:SS Linha 2: Relógio PNL Horas (HH) de 00 a 23 Com possibilidade de acerto Placa com frequência de relógio de 50Mhz Placa onde irá funcionar Xilinx/ Diligent Sparten-3E Preciso do código e ficheiros de testbench até 9 de fevereiro de 2014

I'm seeking a skilled FPGA developer to construct an intermediate-level chessAI project. The AI is expected to run real-time on a Spartan-7 FPGA board, using Vivado and Vitis. Key Project Details: - **Real-time Performance:** The AI should be optimised for real-time operation on the FPGA board. - **Intermediate Complexity:** The chessAI should be capable of intermediate-level game play, providing engaging and challenging performance. - **FPGA Model:** The project is designed for a Spartan-7 FPGA board, hence prior experience with this model is preferable. Key Skill Requirements: - Proficiency in FPGA development, particularly with Vivado and Vitis. - Prior experience in designing chessAI or comparable AI projects. - Expertise in optimising AI models for real-time FPGA implementation...

DEADLINE 21st I need an Object Detection(displays text on screen of object name) & Live Streaming system(records video when switch or button pressed), all to be implemented on a Zybo Z7 board with a pcam 5c camera module. Here are the details: - **Programming Language**: The system needs to be developed using verilog and xlinx tools. - **Standalone or Integrated**: I'm looking for the Object Detection & Live Streaming system to be integrated with zyboz7 and pcam5c. - **Functionality**: The system should perform real-time object detection and identification, as well as record and store live streams for later analysis. Finally report that includes tests/testbenches should be included based on requirements in

I'm looking for a developer to create a system for my Zybo Z7 board that can detect people in real-time through a connected pcam5c camera and display the detection text on the video feed...Video Streaming: The video feed should be streamed in real-time. - Text Overlay: The detection results should be displayed as a text overlay on the video. Skills/Experience Required: - Proficient in Xilinx SDK and Xilinx Vivado. - Strong background in object detection, particularly with people. - Previous experience with video processing and streaming. - Knowledge of FPGA programming and VHDL/Verilog is a plus. Please note that my budget for this project is $60. I'm open to hearing from freelancers who can deliver within this budget. I have worked on single pixel (multipixel z...

Hi ExpertSoul, I noticed your profile and would like to offer you my project. We can discuss any details over chat.

I am looking to integrate two ultrasonic sensors onto a Nexys A7 FPGA board using VHDL. My primary goal is using these sensors for object tracking and distance measurement. Integrate TWO HCSR-04 ultrasonic sensors to an Nexys A7 fpga board so that I can read data from both sensors. I need for the seven-segment display that is on the board to show the distances measured. Using a pushbutton on the board, have the display change to show readings from sensor 1 and when pushed the display shows readings from sensor 2 and vice versa. So basically, the pushbutton toggles which sensor's measurement is displayed on the seven segment display. Also, another push button will be used to toggle back and forth between displaying the distance in centimeters (cm) or inches (in) for both sensor...

I am looking to integrate two ultrasonic sensors onto a Nexys A7 FPGA board using VHDL. My primary goal is using these sensors for object tracking and distance measurement. Integrate TWO HCSR-04 ultrasonic sensors to an Nexys A7 fpga board so that I can read data from both sensors. I need for the seven-segment display that is on the board to show the distances measured. Using a pushbutton on the board, have the display change to show readings from sensor 1 and when pushed the display shows readings from sensor 2 and vice versa. So basically, the pushbutton toggles which sensor's measurement is displayed on the seven segment display. Also, another push button will be used to toggle back and forth between displaying the distance in centimeters (cm) or inches (in) for both sensor...

I am looking for a freelancer to help me with a project that involves evaluating image quality with implementing machine learning algorithms on an FPGA. VIVADO would be preferred to work on. I am seeking a detailed project proposal from freelancers. with Verilog coding Ideal skills/experience: VERILOG VIVADO

My project requires the efficient application of Gaussian filtering in Verilog specifically for enhancing image details. The image type for this task is RGB, and the intended result should lead to clear, detailed images showcasing the potential of Gaussian filters. Key requirements include: - Applying Gaussian filtering to provide image enhancement - Working specifically with RGB images - Delivery of processed images in JPEG format Given the technical nature of this project, proficiency in Verilog and image processing is crucial. A deep understanding of Gaussian filtering algorithms is also necessary. Experience with image manipulation software would be a bonus. This project is ideal for freelancers who are detail-oriented and are adept at transforming complex requirements...

Our project requires an undefined NTT implementation. The exact scope and purpose of this project have not been defined yet, which opens up a wide range of possibilities and different areas of expertise we might need from potential freelancers. It's an exciting opportunity for innovative contributors with skills and experience in: • Network optimization • Improved connectivity • Cost reduction • Increased bandwidth • Enhanced security • Improved scalability As the specifics of the implementation are yet to be discussed, we are particularly interested in freelancers who show a strong, broad understanding of NTT implementations and are capable of adapting and contributing valuable consultancy to the project no matter which direction it takes. This task is...

I'm seeking a proficient VHDL engineer to assist in the development of digital signal processing on a Basys Board 3, requiring knowledge in digital and analog inputs and outputs. The specifics of the digital signal processing algorithm are unclear at this stage due to omitted information. Key skills and experience needed: - Proficiency with VHDL and Basys Board 3 - Sound understanding of both analog and digital inputs and outputs - Aptitude for problem-solving and working with incomplete details - Prior experience in digital signal processing is advantageous.

I'm seeking an experienced and detail-oriented developer to create a Custome PCILeech firmware for SCREAMER PCIE SQUIRREL direct access memory card utilizing the 7 Series FPGA 35t chip. Firmware must...Squirrel. Firmware must bypass and avoid anti-cheat detection on EAC/BE etc. Responsibilities: - Develop firmware for PCILeech FPGA - Debugging and problem-solving throughout firmware development Skills & Experience: - Strong experience in FPGA programming and firmware development - Excellent debugging and problem-solving skills - Experience with high-speed data transmission - Proficiency with VHDL/Verilog languages The timeline for project completion is flexible, indicating a strong emphasis on quality over speed. However, I am eager to commence with the right cand...

For this project, I need a skilled Verilog programmer with FPGA implementation experience. The key task is to encode a 4x4 binary (black and white) image into an 8x8 image using least significant bit replacement. Key Responsibilities: - Implementing a least significant bit replacement algorithm. - Delivering clean and efficient Verilog code. - Ensuring compatibility with FPGA hardware. Required Skills and Experience: - Proficiency in Verilog code - Understanding of LSB replacement - Experience with FPGA implementation - Working knowledge of image processing, specifically with binary images.

I'm seeking highly skilled Verilog programmers with a solid understanding of Moore state machines and Structural models. In this project, you will design a moore coffee machine with verilog on vivado Key responsibilities: - Create a Verilog project according to the tasks mentioned in the document. Everyt task must work correctly. Skills and experience required: - Proficient in Verilog programming. - Previous experience with Moore FSMs. - Knowledge in working with input/output functions in Verilog. - Deep understanding and practice with structural models. Experience in creating similar designs will be a significant advantage. This is an excellent opportunity for a programmer expert in creating practical Verilog designs with ease.

I am looking for a skilled Verilog coder with experience in advanced digital circuit design and implementation. Tasks will involve designing and implementing complex circuits, specifically those involving CPUs or intricate state machines. Key Responsibilities: - Design and implement advanced digital circuits - Test and debug created designs - Maintain documentation of design process and circuit function Skills & Experience: - Expertise in Verilog coding - Experience with complex digital circuit design and implementation - Familiarity with CPUs and complex state machines - Proficiency in using Xilinx Vivado for running Verilog simulations Please ensure you have this experience before placing a bid on this project.

Completing an intermediate-level circuit simulation is on the top of my agenda, and time is of the essence. Key Requirements: - Generate a simulation circuit using either Verilog or VHDL. - The complexity level should be intermediate, meaning that it should include components such as adders, decoders, and multiplexers. Ideal Candidate: An experienced freelancer with a strong background in circuitry and simulation languages such as Verilog or VHDL. Quick response and comprehension of task requirements are paramount due to the urgency of the project. Remember, the successful completion of this project is deemed urgent. Therefore, a prompt response and start are appreciated.

I'm in need of an individual skilled in Verilog who can help me achieve a specific task. - Task: Your main responsibility would be writing Verilog code for a simple module implementation. This does not involve complex system level code designs or CPU architecture. - Objective: The primary objective of the module is to model a specific digital logic circuit. The project does not require interaction with other modules or utilization of specific hardware components. The ideal candidate would possess: - Solid experience in Verilog coding, - Expertise in digital circuits, - Strong understanding of digital logic circuits, - A meticulous approach to ensure accuracy in modeling the required digital logic circuit. If you are passionate about Verilog and love c...

...achieving a specific task. I already have a code for core RISC-V in system Verilog and need help running it in my Linux based virtual machine. The final objective includes enabling a basic load counter and comprehending the code thoroughly. need to create a presentation for my Verilog project. For the first task, I need to count the number of instructions entering the pipeline after a mispredicted branch, which is important for security. I need to run a test code to measure performance and count the flushed instructions. Can you help with this in Verilog? We can work together on it and complete the presentation.? To achieve the listed tasks, the freelancer should possess: - Expert knowledge and experience in working with Verilog, - Proficiency in executi...

I am seeking a proficient electronic engineer with an in-depth understanding of VHDL (high level logic design) it's related to xlinx and vivado

In this project we will be implementing a control system using the Lattice iCE FPGA. The task at hand involves converting a schematic for a Synchronous Data Link Control (SDLC) data stream to an SPI Master data stream converter to Verilog or VHDL and then verifying the design through simulation. And finally creating the file that will be used to program the target part in production. The ideal freelancer for this job is proficient in working with FPGAs, preferably with a strong background in the Lattice iCE FPGA. I’m looking for someone adept in schematic to HDL conversion. Experience in working with SDLC data will serve as a plus. Please ensure that your experience and skills include: - FPGA development, specifically with the Lattice iCE. - Expertise in schematic ...

We've written some VHDL code for FPGA we need someone to adapt it to our coding standard. we will share a report of all violations for a set of files and the VHDL code shall be modified as specified in the coding standard. To make an example all signals shall be names s_<signal_name>, signal test_sig : std_logic; -- violation! signal s_test_sig : std_logic; -- correct the code will be shared with a Gitlab repo, a dedicatd branch will be created to modify the original code. the code shall be compiled, to chekc no errors were introduced. as soon as the code is delivered we wil rerun the checker to chek for residual errors, and we would provide a feedback (unless the freelancer has the same checker tool)

I'm currently in search of an expert in electronics, Specifically FPGA's and Verilog who can assist in creating a 32 channel logic analyzer. The analyzer's primary role will be to facilitate the debugging of digital circuits, analyzing serial communications, and examining micro-controller signals and digital protocols. Key Responsibilities: - Design and create an analyzer able to decipher multiple digital protocols including CAN, SPI, I2C, UART, RS422, RS485, i2C 1-Wire, and SIM devices. - Equip the analyzer with a unique functionality to understand and interpret data in custom HEX, Bianry and ASCII formats. Ideal Experience and Skills: - Proficient in digital protocols and encoding. - Extensive experience in electronics, especially in creating and debugging logic ...

Its about vintage videogames I have a project that make emulation of cartridges. Each original Cartridge have circuits with ASIC customs called " mappers ". Theses mappers circuits are not available for sale, because was made in 90 years. Some hackers rebuild functionality of Asics throught verilog, and implemented in a single cartdridge with ALL mappers inside. In Github are The opensource project , and ALL mappers writed in verilog are available separated. My Idea is take one a one mapper and generate a output file and burn in individual hardware , like Xillinks XC9572 or XC95144 because The original project use hard weight hardware,like a

Hi, I need someone really experienced in FPGA, DSP, and specifically IFF signlas. I need to create an algorithim to detecet different modes of IFF signals and classify them. then display the data of the signals. I will aslo need someone to finalize the verilog code, help me with testing, debugging of my project, it will be a long time agreement not just a task to be done. I am hoping to collaborate with a diligent engineer who accurately interprets given instructions and is capable of delivering quality work. I am looking forward to your proposals.

I need someone proficient in FPGA programming and matrix manipulations to develop a solution that involves multiplying two-dimensional matrices on PYNQ Boards. The project's objectives include: • Computing proc...develop a solution that involves multiplying two-dimensional matrices on PYNQ Boards. The project's objectives include: • Computing processes for small-sized matrices • Ability to handle medium-sized matrices • Building the necessary verilog code and TB to facilitate and optimize the matrix multiplication on the PYNQ boards Here are the critical skills and experience needed for the job: • Familiarity with PYNQ FPGA programming • Experience working with PYNQ Boards • Deep understanding of matrix operations • Proficient...

Bundle of 4 entry level Logic Design outputs --->Verilog , 4-bit wide 2:1 MUX ,Mealy machine , and a little more

We have an existing VHDL project that implements various memory protocols that runs on a Lattice FPGA (MachXO2 LCMXO2-4000HC). The FPGA is used as a high-speed data bridge between an ARM based microcontroller and a connected memory device (using SMC). This project is to expand the existing project and add support for the eMMC protocol and eMMC Flash memory devices. For testing, we have acquired various 64GB devices that are available on Mouser and DigiKey. Basic functionality is required: reading/writing/erasing with legacy speeds and 1,4,8-bit data bus. Project can be extended to include additional modes / features. The project is in Lattice Diamond, and written in VHDL. All work must be done to the existing project. And tested using exported bitstream binaries. Note: if ...

We have an existing VHDL project that implements various memory protocols that runs on a Lattice FPGA (MachXO2 LCMXO2-4000HC). The FPGA is used as a high-speed data bridge between an ARM based microcontroller and a connected memory device (using SMC). This project is to expand the existing project and add support for the eMMC protocol and eMMC Flash memory devices. For testing, we have acquired various 64GB devices that are available on Mouser and DigiKey. Basic functionality is required: reading/writing/erasing with legacy speeds and 1,4,8-bit data bus. Project can be extended to include additional modes / features. The project is in Lattice Diamond, and written in VHDL. All work must be done to the existing project. Note: if you want to make a bid, please respond with yo...

As an FPGA expert, my project demands crucial implementation and testing of FPGA-based systems, along with adept ...transferred and received properly coz its serial data. if the data received equal to certain vaule ( the value i serialized before sending ) then LED is on, or use a method to display the received data. I am also forwarding 2 clocks that i need to receive at the same frequency they were set in the input. Critical Skills - Proficiency in Verilog - Prevailing experience with Xilinx FPGAs Ideal freelancers will possess substantial experience using Verilog for FPGA programming and have a strong background in Xilinx products. Solid debugging skills and the ability to devise efficient tests for FPGA-based systems are a must. ALL CODES ARE DONE, I JUST NEED SOMEONE...

...the specifications and performance targets for the graphics card, considering factors such as core count, memory bandwidth, and power efficiency. Designing and modeling the GPU architecture using computer-aided design (CAD) software, incorporating advanced features for rendering, compute, and artificial intelligence. Implementing the design using hardware description languages (HDLs) such as Verilog or VHDL, and simulating the functionality using specialized tools. Conducting rigorous testing, validation, and optimization to ensure the graphics card meets performance, reliability, and compatibility standards. Iterating on the design based on feedback, performance analysis, and emerging technologies. **Power Efficiency:** - My priority is an energy-saving design. The chall...

...project. - Familiarity with high-speed interface protocols and their integration into FPGA designs. **Ideal Skills and Experience:** - Strong background in electrical engineering or computer science, with a focus on hardware design. - Prior projects or experience in FPGA-based design, especially those involving DSP or video processing. - Proficient in C/C++ for algorithm development and HDL (VHDL/Verilog) for hardware description. - Knowledge of optimization techniques for power efficiency and performance maximization in FPGA designs. - Ability to work with simulation tools and perform thorough validation and testing of the designed hardware. My project calls for an innovative and technically skilled freelancer who can navigate the complexities of advanced FPGA design. I...

I am seeking a talented programmer to develop an encryption algorithm using Verilog language, which will be implemented using FPGA in Xilinx. Key Requirements: - Comprehensive understanding of Verilog programming and encryption algorithms - Extensive experience in FPGA implementation - Proficiency in Xilinx The ideal candidate should be capable of creating an efficient and secure encryption system from scratch. Your algorithm will be tested for security, efficiency, and performance during Evaluation. Please include examples of relevant previous work in your bid. Thank you.